View L4938ED_2073077.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

l4938e/ed l4938epd advanced voltage regulator enable and sense inputs (en, si) pro- tected against negative transients down to -5v reset threshold adjustable from 3.8 to 4.7v extremely low quiescent current, 65 m a (less than 90 m a) in standby mode operating dc supply voltage range 5v - 28v operating transient supply volt- age up to 40v high precision standby output volt- age 5v 1% with 100ma current ca- pability output 2 voltage 5v 2% with 400ma current capability (adj wired to v out2 ) output 2 voltage adjustable by ex- ternal voltage divider output 2 disable function for standby mode description the l4938e/ed/epd is a monolithic integrated dual voltage regulator with two very low dropout outputs and additional functions as power-on re- set and input voltage sense. it is designed for supplying the microcomputer controlled systems especially in automotive applications. february 1999 ? pin connections dip (12+2+2) so20 (12+4+4) powerso20 ordering numbers: l4938e (dip) L4938ED (so) l4938epd (pso) pr ct en gnd gnd so res 1 3 2 4 5 6 7 out2 gnd n.c. gnd vs2 vs1 si 16 15 14 13 12 10 11 d94at075a out1 8 adj 9 dip (12+2+2) pr ct en gnd gnd gnd gnd res so out2 n.c. gnd gnd gnd gnd vs2 vs1 si 1 3 2 4 5 6 7 8 9 18 17 16 15 14 12 13 11 19 10 20 out1 adj d94at076a so (12+4+4) gnd n.c. n.c. v s2 v s1 pr si ct en n.c. gnd 10 8 9 7 6 5 4 3 2 13 14 15 16 17 19 18 20 12 1 11 gnd l4938epd n.c. reset out1 so adj out2 n.c. gnd powerso20 1/12
reg1 1.23v reference reg2 1.23v reset 1.4v 1.23v 1.23v sense vs1 vs2 en pr si so res ct adj out2 out1 gnd d94at074a block diagram absolute maximum ratings symbol parameter value unit v indc dc operating supply voltage 28 v v intr transient operating supply voltage (t < 400ms) -14 to 40 v i o output current internally limited v si sense input voltage (voltage forced) (note 2) -20 to 20 v i si sense input current (current forced) (note 2) 1ma v en enable input voltage (voltage forced) (note 2) -20 to 20 v i en sense input current (current forced) (note 2) 1ma v res , v so output voltages -0.3 to 20 v i res , i so output currents (output low) 5 ma p o power dissipation at t amb = 80 c (note 3) powerdip 12+2+2 875 mw t stg storage temperature -65 to 150 c t j operating junction temperature -40 to 150 c t jsd thermal shutdown junction temperature output 2 will shut-down typically at tj 10k lower than output 1 165 c note 1: the circuit is esd protected according to mil-std-883c note 2: current forced means voltage unlimited but current limited to the specified value voltage forced means voltage limited to the specified valueswhile the current is not limited note 3: typical value soldered on a pc board with 8cm 2 copper ground plane (35mm thick). l4938e - L4938ED - l4938epd 2/12
electrical characteristics (v s = 14v; t j = -40 to 150 c unless otherwise specified.) symbol parameter test condition min. typ. max. unit out 1 v o1 supply output voltage v s = 6 to 28v; i o1 = 400 m a to 100ma 4.955.1v t j 125 c; i o1 = 50 to 400 m a 4.8 5 5.2 v v dp1 dropoutput voltage 1 i out1 = 10ma 0.1 0.2 v i out1 = 100ma; v s = 4.8v 0.2 0.4 v v ol01 load regulation 1 i out1 = 1 to 100ma (after regulation setting) 25 mv v lim1 current limit 1 vout1 = 0.8 to 4.5v 100 200 400 ma i qsb quiescent current in standby mode i en 3 2.4v (output 2 disabled) i o1 = 0.1ma; v si > 1.3v 65 90 m a t j < 85 c; r pr = 0 75 m a out 2 v o2 output voltage 2 adj connected to out 2 enable = low; v s = 6 to 28v; i 02 = 5 to 400ma 4.9 5.1 v v dp2 dropoutput voltage 2 i out2 = 100ma 0.2 0.3 v i out2 = 400ma; v s = 4.8v 0.3 0.6 v v ol02 load regulation 2 i out1 = 5 to 400ma (after regulation setting) 50 mv r adj adjust input resistance 60 100 150 ma i lim2 current limit 2 v02 = 0.8 to 4.5v 450 650 1300 ma i q quiescent current i out1 = 100ma; i out2 = 400ma 20 ma out1, out 2 v oli 1,2 line regulation v s = 6 to 28v; i o1 = 1ma, i o2 = 5ma, (after regulation setting) 20 mv pin functions pin (dip 12+2+2) pin (so 12+4+4) pin powerso20 name function 14 18 3 vs2 supply voltage (400ma regulator) 15 19 4 vs1 supply voltage (100ma regulator, reset, sense) 16 20 5 s1 sense input 1 1 6 pr reset theresold programming 2 2 7 ct reset delay capacitor 3 3 8 en enable (low will activate the 400ma regulator) 4, 5, 12, 13 4, 5, 6, 7, 14, 15, 16, 17 1,10,11,20 gnd ground 6 8 14 res reset output 7 9 15 so sense output 8 10 16 out 1 100ma regulator output 9 11 17 adj feedback of 400ma regulator 10 12 18 out 2 400ma regulator output 11 13 2,9,19 nc not connected thermal data symbol parameter dip 12+2+2 so 12+4+4 powerso20 unit r th j-amb thermal resistance junction to ambient 40 50 - c/w r th j-case thermal resistance junction to case - - <2 c/w note 3: typical value soldered on a pc board with 8cm 2 copper ground plane (35mm thick). l4938e - L4938ED - l4938epd 3/12
electrical characteristics (continued) symbol parameter test condition min. typ. max. unit enable input v enl enable input low voltage (output 2 active) -20 1 v v enh enable input high voltage 1.4 20 v v enhyst enable hysteresis 20 30 60 mv i en low enable input current low v en = 0 -20 -8 -3 m a i en high enable input current high v en = 1.1 to 7v; t j < 130 c; -1 0 1 m a v en = 1.1 to 7v; t j = 130 to 150 c; -10 0 10 m a reset circuit v rt reset theresold voltage (note4) r pr = 4.5 v o1 -0.3 v o1 -0.2 v r pr = 0 3.65 3.8 3.95 v v rth reset theresold hysteresis r pr = 30 60 120 mv t rd min reset pulse delay c res = 47nf; t r 30 m s; (note 5) 40 60 100 ms t rd nom reset pulse delay c res = 47nf; (note 6) 60 100 140 ms t rr reset reaction time c res = 47nf 10 50 150 m s i ct pull down capability of the discharge circuit v out1 < v rt 3615ma i ct charge current v out1 > v rt -1.3 -1 0.7 m a v resl reset output low voltage r res = 10k w to v out1 v out1 3 1.5v 0.4 v v resh reset output high leakage current v res = 5v 1 m a sense comparator v si functional range -20 20 v v sit sense threshold voltage falling edge; t j <130 c 1.08 1.16 1.24 v falling edge; t j <130 to 150 c 1.05 1.16 1.29 v v sith sense threshold hysteresis 10 30 60 mv v sol sense output low voltage v si 1.05v; r so =10k w connected to 5v; v s 3 5v 0.4 v i soh sense output leakage v so = 5v; v si 3 1.5v 1 m a i si high sense input current high v si = 1.1 to 7v; t j <130 c-101 m a v si = 1.1 to 7v; t j <130 to 150 c-10 0 10 m a i si low sense input current low v si = 0v -20 -8 -3 m a note : 4) the reset threshold can be programmed continuously from typ 3.8v to 4.7v by changing a value of an external resistor from pi n pr to gn 5) this is a minimum reset time according to the hysteresis of the comparator. delay time starts with v out1 exceeding v rt 6) this is the nominal reset time depending on the discharging limit of c t (saturation voltage) and theupper threshold of the timer comparator. delay time starts with v out1 exceeding v rt 7) the leakage of c t must be less than 0.5ma (2v). if an external resistor between c t and v out1 is applied, the leakage current may be increased. the external resistor should have more than 30k w . for stability: cs 3 1 m f, c01 3 10 m f, c02 3 10 m f, esr 5 w (designed target) for details see application note. 8) for transients exceeding 20v or -20v external protection is required at the pins si and en as shown at pin en. the protectio n proposed will provide proper function for transients in the range of 200v. if the zener diode is omitted the external resistor should be raised to 200k w to limit the current to 1ma. without the zener diode, the function 20v or -20v can not be guaranteed. l4938e - L4938ED - l4938epd 4/12
functional description the l4938e/ed/epd is a monolithic integrated dual voltage regulator, based on the stm modu- lator voltage regulator approach. several out- standing features and auxiliary functions are im- plemented to meet the requirements of supplying microprocessor systems in automotive applica- tions. nevertheless, it is suitable also in other ap- plications where two stabilized voltages are re- quired. the modular approach of this device allows to get easly also other features and func- tions when required. standby regulator the standby regulator uses an isolated collector vertical pnp transistor as a regulating element. with this structure very low dropout volotage at currents up to 100ma is obtained. the dropout operation of the standby regulator is maintained down to 3v input supply voltage. the output volt- age is regulated up to the transient input supply voltage of 40v. with this feature no functional in- terruption due to overvoltage pulses is generated. in the standby mode when the output 2 is dis- abled, the current consumption of the device (qui- escent current) is less than 90 m a (14v supply voltage). to reduce the quiescent current peak in the un- dervoltage region and to improve the transient re- sponse in this region, the dropout voltage is con- trolled. a second regulation path will keep the output voltage without load below 5.5v even at high temperatures. output 2 voltage the output 2 regulator uses the same output structure as the standby regulator but rated for the output current of 400ma. the output voltage is internally fixed to 5v if adj is connected to v out2 . the output 2 regulator can be switches off via the enable input. reg1 1.23v reference reg2 1.23v reset 1.4v 1.23v 1.23v sense vs1 vs2 en pr si so res ct adj out2 out1 gnd d94at079a 15v 100k c s (note 8) for example bzx97c15 ct (note 7) c o2 c o1 v out1 r so figure 1. application diagram. 1.23v d94at080 - + r 1i r 2i out2 adj r 1e r 2e r adj total 100k typical figure 2. l4938e - L4938ED - l4938epd 5/12
connecting a resistor divider r 1e , r 2e to the adj, out2 pin the output voltage 2 can be pro- grammed to the value of v out2 = v out1 ? ? 1 + r 1e ( r 2e + r adj ) r 2e r adj ? ? with r adj = 60k to 150k and v out1 = 4.95 to 5.05v. for an exact calculation the temperature coeffi- cient (tc -2000pprm) of the internal resistor (r adj ) must be taken into account. pin adj in this mode should not have a capacitive burden be- cause this would reduce the phase margin of the regulator loop. reset circuit the reset circuit supervises the standby output voltage. the reset output (res) is defined from v out 3 1v. even if v s is lacking, the reset generator is sup- plied by the output voltage v out1 . the reset threshold of 4.7v is defined with the in- ternal reference voltage (note 9) and standby out- put divider, when pin pr is left open. the reset threshold voltage can be programmed in the range from 3.8v to 4.7v by connecting an exter- nal resistor from pin pr to gnd. the value of the programming resistor r pr can be calculated with: r pr = 22k 4.7k v rt - 1 - 92.9k, 3.8v v rt 4.7v the reset pulse delay time t rd , is defined with the charge time of an external capacitor c t : t rdmin = c t 0.6v 1 m a (note 5) t rdnom = c t 1.4v 1 m a (note 6) the reaction time of the reset circuit originates from the noise immunity. standby output voltage drops below the reset threshold only a bit longer than the reaction time results in a shorter reset delay time. the nominal reset delay time will be generated for standby output voltage drops longer than approximately 50 m s. the minimum rset time is generated if reset con- dition only occures for a short time triggering a re- set pulse but not completely discharging c t . the reset can be related to output2 on request. if higher charge currents for the reset capacitor are required a resistors from pin c t to out1, may be used to increase the current. we recommended the use of 10k w to 5v as an output pull up. sense comparator the sense comparator compares an input signal with an internal voltage reference of typical 1.23v. the use of an external voltage divider makes this comparator very flexible in the application. it can be used to supervise the input voltage either be- fore or after the protection diode and to give addi- tional information to the microprocessor like low voltage warnings. we recommended the use of 10k w to 5v as an output pull up. note 9: the reference is alternatively supplied from v s or v out1 . if one supply is present, the reference is operating. thermal protection both outputs are provided with an overtempera- ture shut down regulation power dissipation down to uncritical values. output 2 will shut down approximately 10k before output 1. under normal conditions shut down of output 2 will allow the chip to cool down again. thus out- put 1 will be unaffected. the thermal shut down reduces the output volt- ages until power dissipation and the flow of ther- mal energy out of the chip balance. transient sensitivity in proper operation (v out > 4.5v) the reference is supplied by v out1 thus reducing sensitivity to in- put transients. precise data will be issued as soon as samples are available. l4938e - L4938ED - l4938epd 6/12
1 m a d94at081 - + out1 res low threshold v be at 1 m a=0.5v at 25?c pr vout1 74k reg 17k ref 1.23v - ct ct 10...100k high threshold =1.4 figure 3. reset generator figure 4: l4938e - L4938ED - l4938epd 7/12
input protection the inputs enable (en) and sense in(si) are pro- tected against negative transients. figure 5 is showing the simplified schematic figure 5. input characteristics of si, en: l4938e - L4938ED - l4938epd 8/12
dim. mm inch min. typ. max. min. typ. max. a1 0.51 0.020 b 0.85 1.40 0.033 0.055 b 0.50 0.020 b1 0.38 0.50 0.015 0.020 d 20.0 0.787 e 8.80 0.346 e 2.54 0.100 e3 17.78 0.700 f 7.10 0.280 i 5.10 0.201 l 3.30 0.130 z 1.27 0.050 powerdip 16 outline and mechanical data l4938e - L4938ED - l4938epd 9/12
11 0 11 20 a e b d e l k h a1 c so20mec h x 45? so20 dim. mm inch min. typ. max. min. typ. max. a 2.35 2.65 0.093 0.104 a1 0.1 0.3 0.004 0.012 b 0.33 0.51 0.013 0.020 c 0.23 0.32 0.009 0.013 d 12.6 13 0.496 0.512 e 7.4 7.6 0.291 0.299 e 1.27 0.050 h 10 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 l 0.4 1.27 0.016 0.050 k 0? (min.)8? (max.) outline and mechanical data l4938e - L4938ED - l4938epd 10/12
jedec mo-166 powerso20 e a2 a e a1 pso20mec detail a t d 1 11 20 e1 e2 h x 45 detail a lead slug a3 s gage plane 0.35 l detail b r detail b (coplanarity) gc - c - seating plane e3 b c n n h bottom view e3 d1 dim. mm inch min. typ. max. min. typ. max. a 3.6 0.142 a1 0.1 0.3 0.004 0.012 a2 3.3 0.130 a3 0 0.1 0.000 0.004 b 0.4 0.53 0.016 0.021 c 0.23 0.32 0.009 0.013 d (1) 15.8 16 0.622 0.630 d1 9.4 9.8 0.370 0.386 e 13.9 14.5 0.547 0.570 e 1.27 0.050 e3 11.43 0.450 e1 (1) 10.9 11.1 0.429 0.437 e2 2.9 0.114 e3 5.8 6.2 0.228 0.244 g 0 0.1 0.000 0.004 h 15.5 15.9 0.610 0.626 h 1.1 0.043 l 0.8 1.1 0.031 0.043 n 10? (max.) s t10 0.394 (1) "d and f" do not include mold flash or protrusions. - mold flash or protrusions shall not exceed 0.15 mm (0.006"). - critical dimensions: "e", "g" and "a3" outline and mechanical data 8? (max.) 10 l4938e - L4938ED - l4938epd 11/12
information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsib ility for the cons equences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specification mentioned in this pu blication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicr oelectronics. the st logo is a registered trademark of stmicroelectronics ? 1999 stmicroelectronics C printed in italy C all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - france - germany - italy - japan - korea - malaysia - malta - mexico - morocco - the neth erlands - singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. http://www.st.com l4938e - L4938ED - l4938epd 12/12

▲Up To Search▲

Price & Availability of L4938ED

	To Download L4938ED Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .